Design of a Fast and Low-Power Sense Amplifier and Writing Circuit for High-Speed MRAM

by Hochul Lee, Juan G. Alzate, Richard Dorrance, Xue Q.and Markovi&cacute; Dejan Cai, Pedram Khalili Amiri, Kang L. Wang

Abstract:

A high-speed and low-power pre-read and write sense amplifier (PWSA) is presented for magnetoresistive random access memory (MRAM). The sense amplifier incorporates a writing circuit for MRAM bits switched via timing of precessional dynamics ( GHz speed) in a magnetic tunnel junction (MTJ). By combining read and write functions in a single power-efficient circuit, the PWSA allows for fast read and write operations while minimizing the bit error rate (BER) after data programming. The PWSA circuit is designed based on a 65 nm CMOS technology, and the magnetic dynamics are captured by a Verilog-A compact model based on macrospin behavior for MTJs. Using the pre-read and comparison steps in the data program operation, we are able to reduce write power consumption by up to 50% under random data input conditions. Furthermore, by using the voltage controlled magnetic anisotropy (VCMA) effect for precessional switching, more than 10x reduction of write power and transistor size both in the memory cell and the write circuit is achieved, compared to using the spin transfer torque (STT) effect. The circuit achieves 2ns read time, 1.8ns write time, and 8 ns total data program operation time (consisting of two read steps, one write step and a pass/fail check step) by using this PWSA concept, and a 2x larger sensing margin through the current feedback circuit.

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Reference:

H. Lee, J. G. Alzate, R. Dorrance, X. Q. M. Cai, P. K. Amiri, K. L. Wang, "Design of a Fast and Low-Power Sense Amplifier and Writing Circuit for High-Speed MRAM," IEEE Transactions on Magnetics (TMAG), vol. 51, no. 5, pp. 1–7, May 2015.

Bibtex Entry:

@ARTICLE{Lee2015:TMAG,
    author    = {Lee, Hochul and Alzate, Juan G. and Dorrance, Richard and Cai, Xue Q.and Markovi'{c}, Dejan and Amiri, Pedram Khalili and Wang, Kang L.},
    title     = {{Design of a Fast and Low-Power Sense Amplifier and Writing Circuit for High-Speed MRAM}},
    journal   = {IEEE Transactions on Magnetics (TMAG)},
    year      = {2015},
    month     = {May},
    volume    = {51},
    number    = {5},
    pages     = {1--7},
    doi       = {10.1109/TMAG.2014.2367130},
    abstract  = {A high-speed and low-power pre-read and write sense amplifier (PWSA) is presented for magnetoresistive random access memory (MRAM). The sense amplifier incorporates a writing circuit for MRAM bits switched via timing of precessional dynamics (~ GHz speed) in a magnetic tunnel junction (MTJ). By combining read and write functions in a single power-efficient circuit, the PWSA allows for fast read and write operations while minimizing the bit error rate (BER) after data programming. The PWSA circuit is designed based on a 65 nm CMOS technology, and the magnetic dynamics are captured by a Verilog-A compact model based on macrospin behavior for MTJs. Using the pre-read and comparison steps in the data program operation, we are able to reduce write power consumption by up to 50% under random data input conditions. Furthermore, by using the voltage controlled magnetic anisotropy (VCMA) effect for precessional switching, more than 10x reduction of write power and transistor size both in the memory cell and the write circuit is achieved, compared to using the spin transfer torque (STT) effect. The circuit achieves 2ns read time, 1.8ns write time, and 8 ns total data program operation time (consisting of two read steps, one write step and a pass/fail check step) by using this PWSA concept, and a 2x larger sensing margin through the current feedback circuit.},
    url       = {https://rdorrance.com/pdf/Lee2015TMAG.pdf}
}