Error Tolerant Architectures for Power Efficient Computing and Communications

by Richard Dorrance, Andrey Belogolovy, Hechen Wang, Xue Zhang

Abstract:

Reference:

R. Dorrance, A. Belogolovy, H. Wang, X. Zhang, "Error Tolerant Architectures for Power Efficient Computing and Communications," in Design and Test Technology Conference (DTTC’19), pp. 1–8, May 2019.

Bibtex Entry:

@INPROCEEDINGS{Dorrance2019:DTTC,
    author    = {Dorrance, Richard and Belogolovy, Andrey and Wang, Hechen and Zhang, Xue},
    title     = {{Error Tolerant Architectures for Power Efficient Computing and Communications}}, 
    booktitle = {Design and Test Technology Conference (DTTC'19)},
    year      = {2019},
    month     = {May},
    pages     = {1--8},
    doi       = {},
    abstract  = {},
    url       = {}
}